target.hpp

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#ifndef TDLS_CORE_TARGET_HPP
#define TDLS_CORE_TARGET_HPP
 
 
 
 
 
 
#if defined(__clang__)
#define TDLS_DETAIL_COMPILER_CLANG
#endif
#if defined(__GNUC__) && !defined(__clang__)
#define TDLS_DETAIL_COMPILER_GCC
#endif
#if defined(_MSC_VER) && !defined(__clang__)
#define TDLS_DETAIL_COMPILER_MSVC
#endif
#if defined(__GNUC__) || defined(__clang__)
#define TDLS_DETAIL_COMPILER_GNU_ATTRIBUTES
#endif
#if defined(__NVCC__)
#define TDLS_DETAIL_COMPILER_NVCC
#endif
#if defined(__NVCOMPILER)
#define TDLS_DETAIL_COMPILER_NVCXX
#if !(defined(__NVCC__) && defined(__CUDA_ARCH__))
#define TDLS_DETAIL_CODEGEN_NVCXX
#endif
#endif
#if defined(__HIP__)
#define TDLS_DETAIL_COMPILER_HIP_CLANG
#endif
 
#if defined(__HIPCC__) || defined(__HIP__)
#define TDLS_DETAIL_LANG_HIP
#endif
#if defined(__CUDACC__) || defined(__CUDA__)
#define TDLS_DETAIL_FRONTEND_CUDA
#if !defined(TDLS_DETAIL_LANG_HIP)
#define TDLS_DETAIL_LANG_CUDA
#endif
#endif
#if defined(__SYCL_DEVICE_ONLY__)
#define TDLS_DETAIL_LANG_SYCL_DEVICE
#endif
 
#if defined(__NVCOMPILER)
#if defined(__NVCOMPILER_STDPAR_OPENACC_GPU)
#define TDLS_DETAIL_PASS_NVCXX_STDPAR_OPENACC
#elif defined(_NVHPC_CUDA)
#define TDLS_DETAIL_PASS_NVCXX_CUDA
#elif defined(__NVCOMPILER_OPENMP_GPU) || defined(__NVCOMPILER_OPENACC_GPU)
#define TDLS_DETAIL_PASS_NVCXX_OFFLOAD
#else
#define TDLS_DETAIL_PASS_HOST
#endif
#elif defined(__AMDGCN__) && defined(__clang__) &&                                                 \
    (defined(__HIP_DEVICE_COMPILE__) || !defined(__HIP__))
#define TDLS_DETAIL_PASS_AMDGCN
#elif defined(__CUDA_ARCH__) && (defined(__CUDACC__) || defined(__CUDA__))
#define TDLS_DETAIL_PASS_CUDA
#elif defined(__NVPTX__) && defined(__clang__) && !defined(__CUDA__)
#define TDLS_DETAIL_PASS_NVPTX
#elif !defined(__clang__) && (defined(__nvptx__) || defined(__AMDGCN__) || defined(__amdgcn__))
#define TDLS_DETAIL_PASS_GCC_OFFLOAD
#elif defined(__SYCL_DEVICE_ONLY__) || ((defined(__SPIR__) || defined(__SPIRV__)) &&               \
                                        (defined(__HIP_DEVICE_COMPILE__) || !defined(__HIP__)))
#define TDLS_DETAIL_PASS_SPIRV
#elif defined(__ACPP_ENABLE_LLVM_SSCP_TARGET__) || defined(__HIPSYCL_ENABLE_LLVM_SSCP_TARGET__)
#define TDLS_DETAIL_PASS_ACPP_GENERIC
#else
#define TDLS_DETAIL_PASS_HOST
#endif
 
#if defined(TDLS_DETAIL_PASS_HOST)
#define TDLS_DETAIL_TARGET_GPU 0
#else
#define TDLS_DETAIL_TARGET_GPU 1
#endif
 
#ifndef TDLS_TARGET_GPU
#define TDLS_TARGET_GPU TDLS_DETAIL_TARGET_GPU
#if defined(TDLS_DETAIL_PASS_NVCXX_CUDA)
#define TDLS_DETAIL_SIDE_DISPATCH
#endif
#endif
 
 
 
#endif // TDLS_CORE_TARGET_HPP